1. Technical Field
The invention relates to semiconductor devices and components and, specifically, to metal oxide dielectric materials for use in semiconductor devices and components.
2. Art Background
Dielectric materials are a key aspect to the performance of semiconductor devices. As devices become smaller, and the need for higher performance becomes greater, the thickness of the dielectric layers in semiconductor devices is decreasing. At the same time, the need for dielectric materials with a dielectric constant greater than that of the most common dielectric material, SiO.sub.2, is increasing. Also, as the thickness of the dielectric layer in semiconductor devices decreases, the need for materials that do not leak charge even when the layer of the dielectric material is very thin (e.g. less than 100 .ANG.) is increasing.
However, not all dielectric materials form acceptable, thin dielectric layers for use in semiconductor devices and components. Semiconductor devices have certain performance requirements such as efficiency, power of operation, etc. The properties of the layer of dielectric material directly effect device performance. For example, if the thin dielectric layer allows too much current to pass through it (this unwanted current is referred to as leakage current), then the resulting device or component will not meet the desired performance requirement. Since the leakage current through the gate dielectric of a MOSFET (metal-oxide-semiconductor-field-effect-transistor) indicates the insulation properties (resistance and reliability) of the dielectric, a gate dielectric layer through which the leakage current is too high indicates that the resistance and reliability of the dielectric layer is too low. In the semiconductor device context in which the layer of dielectric material is an interpoly (i.e. the dielectric material is sandwiched between two layers of polycrystalline silicon) dielectric material (IPD), the leakage current in the IPD is related to the retention time of the flash memory. If the leakage current through the IPD is too high, then the retention time of device will be too low.
The interface state density between the dielectric layer and the underlying semiconductor interface also affects device performance. The interface state density degrades the current drive (current across the channel) and the reliability of MOSFETs and MIS(metal-insulator-semiconductor)FETs. Thus, if the interface state density is too high, then the resulting device or component will not meet the desired performance requirement.
Consequently dielectric materials that form thin dielectric layers with acceptable leakage characteristics and other properties are sought.